The use of semiconductor integrated circuit devices has expanded to applications where the operating environment is hostile, such as the automotive and industrial applications. Electromagnetic noise spikes which are ever present in these environments may cause these devices to malfunction. Additionally, noisy power supplies may disrupt device operations. For a circuit to function properly in these applications, the designers of the integrated circuit devices have to contend with the presence of electromagnetic noises and their undesirable interference with device operations.
The designers have attempted to noise-proof the devices on several fronts. New semiconductor technologies have been developed which are less susceptible to noise, and innovative packaging which shields the electronics from the noisy environment have been developed. It has also become desireable to detect a fault when it occurs in an integrated circuit device so that remedial steps may be taken to correct the situation.
Integrated circuit devices may have a number of latches which store input values present at the input pins. These input latches may be sensitive to noise and may be reset incorrectly in its presence. As a result, the input values needed to perform circuit functions may become lost, causing the device to perform incorrectly and/or to produce incorrect output values.
In a particular device application, latches are used to latch in values associated with identifying specific test modes for testing and exercising the device. If the control signals enabling and resetting the latches are sensitive to noise in the operating environment, the test mode values are lost, resulting in the device not being properly tested. In order for the device manufacturer to ensure device quality, such faults occurring during the test procedure must be detected so that the device may be retested.
Accordingly, a need has arisen for a circuit and method which detects faults associated with input latches in an integrated circuit device, so that corrective steps may be taken. The circuit should also advantageously improve the testability of an integrated circuit device.